8051 Pin Description : 


XTAL 2 (Pin 18):

• Output of inverting amplifier that forms a port of the oscillator and input to the internal clock generator In case of external clock, it must be connected to XTAL 2

XTAL 1 (Pin 19):

• XTAL 1 is the input to the inverting amplifier that forms part of the oscillator circuit. In case of external clock, the pin must be connected to ground.

Vec (Pin 40) :

• Va pin is connected to +5V power supply. Rated power supply current for 8031/8051 is 125 mA. The minimum power dissipation rating is 1 W.

Vs (Pin 20) :

• Vas is the circuit ground. All the voltages are specified with respect to this pin. For example, voltage on any pin with respect to Vss should be within -0.5 to + 0.7 V range

Port 0 (Pin 32-39) :

Port 0 is on 8-bit true bidirectional open drain I/O port. Low order address and
data bus is also multiplexed with port 0. Port O is open drain and must be pulled
high externally through a pull up resistor

Port 1 (Pin 1-8) :


Port 1 is on 8-bit Quasi bidirectional 1/0 port. The term Quasi bidirectional port is due to the fact that port 1 pins are internally pulled high with fixed pull up resistors. One has to configure it either as input or output. Writing a 'l' to the port latch causes it to act as input. When configured as input, the port pin is pulled high and will source current, if it is made low externally

Port 2 (Pins 21-28) :

Port 2 is also an 8-bit Quasi bidirectional 1/0 port. Port pins are pulled high internally. It is multiplexed with the high order address bus

Port 3 (Pin 10-17):

Port 3 is again an 8-bit Quasi bidirectional 1/0 port Port pins are pulled high internally. There are other functions multiplexed with port 3 pins. These alternate functions of port 3 pins are related to external interrupts, serial port, timer/counter and read/write control signals

RST (Pin 9)

For resetting the device, the RST pin of 8051 is made high for two machine cycles, while the oscillator is running A power-on-reset circuit .

 A pull down resistor of 8.2 k form the RST pin to Ves and a capacitor of 10 uf from the RST pin to Vec form the reset circuit. These component values are sufficient to provide a delay, so as to make the RST line high for 24 oscillator periods. To support the manual reset function, if desired so, a switch may be added across the 10 pf capacitor

ALE/PROG :

Address latch enable (ALE) output is used for latching the low address byte during external memory access. ALE is activated periodically with a constant rate of 1/6 the oscillator frequency. However, during the external data memory access, one ALE pulse is skipped.

PSEN:

• Program store enable (PSEN) is the output control signal, activated every six oscillator periods, while fetching the external program memory It is the read strobe to external program memory. During the internal program execution, it remains high.

EA:

External access (EA) pin, when held high, executes instruction from the internal program memory till address OFFFH; beyond this address, the instructions are fetched from external program memory.
 If this pin is low, all the instructions are fetched form the external memory. During normal operation, this pin should not be floated.